# LattePanda IOTA — Hardware Notes

Collected 2026-09-11 from vendor documentation and independent reviews (sources at the bottom).
Companion to `COMPONENTS.md §1` (LattePanda 3 Delta, the board currently deployed on the tower).

> **Status: desk research.** Nothing here has been measured on a physical IOTA. Items marked
> **[VERIFY]** must be confirmed against the board or its schematic before anyone cuts a harness.

---

## 1. Why this board is different

The IOTA is not a drop-in successor to the 3 Delta. Two changes break existing assumptions:

1. **The co-processor changed from ATmega32U4 (8-bit AVR, 5 V) to RP2040 (32-bit Cortex-M0+, 3.3 V).**
   The gimbal firmware is an AVR/Leonardo PlatformIO project; it must be ported, and **the RP2040 I/O
   pins are not 5 V tolerant.**
2. **The expansion layout changed.** No M.2 B-key (the 5G modem's slot), no M.2 M-key (NVMe moves to a
   16-pin FPC PCIe adapter board), and the header exposes only one PCH-side UART — no PCH I2C.

---

## 2. Core specifications

| Item | LattePanda IOTA | LattePanda 3 Delta (current tower board) |
|------|-----------------|------------------------------------------|
| CPU | Intel Processor **N150** "Twin Lake", 4C/4T, up to 3.60 GHz, 6 MB cache | Intel Celeron **N5105** "Jasper Lake", 4C/4T, 2.0–2.9 GHz |
| GPU | Intel Graphics, 24 EU, up to 1.0 GHz | Intel UHD, 450–800 MHz |
| TDP | Configurable **6 W – 15 W** | ~12 W typical |
| RAM | 8 GB / 16 GB LPDDR5 4800 MT/s, **in-band ECC** | 8 GB LPDDR4 2933 MT/s |
| Storage | 64 GB / 128 GB eMMC 5.1 + microSD | 64 GB eMMC 5.1 + microSD |
| TPM | TPM 2.0 (in CPU) | — |
| RTC | **Yes**, 2-pin 1.25 mm, CR2032 included | (V1 lacked one; Delta has one) |
| Dimensions | 88 × 70 × 19 mm (vendor page; CNX lists 88 × 77 × 19) | 125 × 78 mm |
| Power in | USB-C **PD 15 V** *(power input only)*, or PH2.0 4-pin **10–15 V DC** | 12 V DC (7.4–15 V) |
| OS support | Windows 10/11, Ubuntu 22.04 / 24.04 | Windows 10/11, Ubuntu, Android |
| Price | ~$129 board only; kits from ~$166 | — |

**Relevance to the fire-watch tower:** the N150 is a straight upgrade over the N5105 — newer Gracemont
cores, ~1.24× the clock ceiling, LPDDR5 vs LPDDR4. The 10–15 V DC input covers the tower's 12 V rail.

---

## 3. Co-processor: RP2040

| Item | RP2040 (IOTA) | ATmega32U4 (Delta) |
|------|---------------|--------------------|
| Core | Dual-core Arm Cortex-M0+ @ 133 MHz | Single-core 8-bit AVR @ 16 MHz |
| SRAM | 264 KB | 2.5 KB |
| Flash | 8 MB | 32 KB |
| **I/O logic level** | **3.3 V — NOT 5 V tolerant** | 5 V |
| Host link | **USB 2.0 CDC** (appears as a serial device) | USB 2.0 CDC (native USB) |
| Toolchains | Arduino C++, MicroPython, Firmata | Arduino C++ |
| Flashing | **UF2 bootloader**: hold `BOOTSEL`, tap `RST`, release → mounts as mass storage `RPI-RP2`, drag the `.uf2` | avrdude over the CDC port (Leonardo 1200-baud touch) |

**Internal RP2040 connections (not on the header):** GPIO20 = SW button, GPIO21 = RST, GPIO25 = blue LED.

### Host-side enumeration
The Delta's Leonardo enumerates as USB `2341:8036` → `/dev/serial/by-id/usb-Arduino_LLC_Arduino_Leonardo-if00`.
An RP2040 running the Arduino-Pico core enumerates as `2e8a:000a` (CDC) and `2e8a:0003` in BOOTSEL mode.
**[VERIFY]** the exact VID:PID and `by-id` string on the real board — the `[Serial] device` config value
and any udev rule key off it.

---

## 4. The 36-pin GPIO header (2×18, 2.54 mm)

| Pin | Signal | Dir | Level | Notes |
|-----|--------|-----|-------|-------|
| 1 | SPK+ | Out | — | Speaker, up to 2 W RMS / 4 Ω |
| 2 | SPK− | Out | — | |
| **3** | **TXD** | Out | **3.3 V** | **PCH serial, COM1 / `ttyS0`** |
| **4** | **RXD** | In | **3.3 V** | **PCH serial, COM1 / `ttyS0`** |
| 5 | GND | — | — | |
| 6 | 5V | Pwr | 5 V | Power Output 1, **0.5 A max** |
| 7–13 | GP0 … GP6 | I/O | 3.3 V | RP2040 GPIO |
| 14–16 | GP26 … GP28 | I/O | 3.3 V | ADC-capable, **100 nF to GND — unusable for I2C/SPI** |
| 17 | 3.3V | Pwr | 3.3 V | RP2040 rail, 1.2 A max |
| 18 | RST | In (pull-up) | 3.3 V | System reset, pull low |
| 19 | 5V | Pwr | 5 V | Power Output 2, **1.2 A max** |
| 20 | D− | I/O | — | USB 2.0, native PCH |
| 21 | D+ | I/O | — | USB 2.0, native PCH |
| 22 | GND | — | — | |
| 23 | S0 | Out | 3.3 V | OS-running indicator (200 Ω series, drives an LED) |
| 24 | S3 | Out | 3.3 V | OS-sleeping indicator (200 Ω series) |
| 25–31 | GP7 … GP13 | I/O | 3.3 V | RP2040 GPIO |
| 32 | RUN | In | 3.3 V | RP2040 reset, active low |
| 33 | SCLK | I/O | 3.3 V | RP2040 SWCLK (SWD debug) |
| 34 | SDIO | I/O | 3.3 V | RP2040 SWDIO (SWD debug) |
| 35 | GND | — | — | |
| 36 | SW | In (pull-up) | 3.3 V | System power button, pull low |

**Warnings from the vendor docs**
- Do not draw from 5 V Power Output 1 and Output 2 simultaneously.
- GP26–GP28 carry 100 nF to ground for ADC stability; avoid them for I2C or any fast edge.
- Do not apply >3.3 V to any RP2040 pin.

### Usable RP2040 GPIO budget
**GP0–GP13 (14 clean pins)** plus GP26–GP28 (analog-only in practice). GP14–GP25 are not broken out.

RP2040 peripheral options **within GP0–GP13**:

| Peripheral | Available pins in GP0–GP13 |
|------------|----------------------------|
| SPI0 | SCK GP2/GP6, TX(MOSI) GP3/GP7, RX(MISO) GP0/GP4, CSn GP1/GP5 |
| SPI1 | SCK GP10, TX(MOSI) GP11, RX(MISO) GP8/GP12, CSn GP9/GP13 |
| I2C0 | SDA GP0/GP4/GP8/GP12, SCL GP1/GP5/GP9/GP13 |
| I2C1 | SDA GP2/GP6/GP10, SCL GP3/GP7/GP11 |
| UART0 | TX GP0/GP12, RX GP1/GP13 |
| UART1 | TX GP4/GP8, RX GP5/GP9 |

Any RP2040 pin can also be PWM or PIO. **[VERIFY]** against the published pinout — the peripheral map
above is from the RP2040 datasheet, not from LattePanda.

---

## 5. I/O and expansion

| Interface | IOTA | Delta (for comparison) |
|-----------|------|------------------------|
| USB Type-A | **3 × USB 3.2 Gen 2 (10 Gbps)** | 1 × 3.2 Gen2 + 2 × 3.2 Gen1 |
| USB header | USB 2.0 pin header (pins 20/21) | — |
| USB-C | **Power input only (PD 15 V)** — no data, no DP-alt | USB 2.0 Type-C + DP 1.4 alt |
| Ethernet | 1 × GbE RJ45, WoL (**Realtek, `r8169`**) | Intel I225-V GbE |
| Video | HDMI 2.1 (4K@60), eDP 1.4b 2-lane (1080p60) | HDMI 2.0b, DP via USB-C, eDP 30-pin |
| **M.2 E-key 2230** | PCIe 3.0 ×1 / USB 2.0 / CNVio2 — Wi-Fi/BT | present |
| **M.2 B-key** | **ABSENT** | present (2242/2252/2280, SATA/USB2/USB3/SIM) |
| **M.2 M-key** | **ABSENT** — use the FPC PCIe adapter | present (2280, PCIe 3.0 ×2) |
| PCIe FPC | 16-pin, 0.5 mm, **PCIe 3.0 ×1**, 2.2 A shared across two 5 V pins | — |
| microSD | TF slot | Micro-SD + Micro-SIM combo |
| Audio | 3.5 mm jack, speaker via header, HDMI digital | 3.5 mm combo |
| Fan | 4-pin 1.25 mm, PWM, 5 V | — |
| UPS | 10-pin 1.25 mm USB 2.0 connector | — |

### Known expansion boards
- **DFR1250 — M.2 M-key expansion**: converts the 16-pin FPC to an M.2 M-key slot, PCIe 3.0 ×1 (8 GT/s),
  2230 and 2280, bus-powered, no drivers. **NVMe only — SATA M.2 SSDs are not supported.**
  Measured ~810 MB/s in an independent review.
- PoE expansion board — works as a standalone gigabit interface.
- UPS board — **reported working only on Windows 10/11; Linux NUT did not see a USB device.**

---

## 6. Linux behaviour (independent report, Nov 2025)

- Fedora Server 43 / kernel 6.17.7 installed cleanly, "no quirks or oddities". Ubuntu 22.04/24.04 are
  the vendor-supported targets.
- Ethernet is Realtek via `r8169`.
- eMMC: ~316 MB/s sequential read, ~175 MB/s write, ~0.15 ms read latency.
- NVMe over the FPC adapter: ~810 MB/s.
- Power: ~4.0 W idle; 24.4 W under disk stress; 36.3 W peak under combined CPU+disk, dropping as the CPU throttles.
- Thermals with the active cooler: ~80 °C initially under sustained all-core load, settling ~70 °C at
  2.2–2.3 GHz; ~2.9 GHz on brief single-core bursts. **The stock active cooler is loud** ("very strong
  high-pitched whine") — relevant only if anyone has to sit next to it.
- 24 h stress with the thermal-pad film accidentally left on produced no throttling.
- 3 USB storage devices ran ~24 h / 72 TB of reads with no kernel instability.
- RTC present, so the systemd timer problems seen on the V1 are gone.

---

## 7. Migration notes (vendor "V1 → IOTA" guide)

- **Voltage:** 5 V peripherals now need level shifting. Explicit warning against >3.3 V on any pin.
- **Sketches:** existing Arduino code "needs porting" — library support differs, port-manipulation code
  differs, timing and interrupt handling diverge from 8-bit AVR.
- **Display:** MIPI-DSI → eDP 1.4b; the 7-inch MIPI display (FIT0477) is incompatible (replacement FIT1030).
- **Power:** micro-USB 5 V → USB-C PD 15 V; internal connector now 10–15 V DC.
- The guide does **not** cover bootloader details, Arduino IDE board selection, upload-method changes, or
  a library compatibility matrix.

---

## 8. Open questions — confirm on real hardware

| # | Question | Why it matters |
|---|----------|----------------|
| 1 | Is there **any** PCH-side I2C/SMBus reachable on the IOTA? The published header shows only COM1. | The SHT41 ambient sensor lives on the Delta's `/dev/i2c-2` (Synopsys DesignWare LPSS). With no PCH I2C it must move to the RP2040 or to a USB-I2C bridge. |
| 2 | Is header COM1 (pins 3/4) **3.3 V TTL or true RS-232 levels**? Docs say 3.3 V. | The Xsens MTi is on the Delta's RS-232 header at `/dev/ttyS0`. A level mismatch needs a transceiver or a USB-serial adapter. |
| 3 | Exact RP2040 VID:PID and `/dev/serial/by-id/` string. | `[Serial] device` and the udev rule. |
| 4 | Does the header COM1 enumerate as `ttyS0` under Linux, and is it enabled in BIOS? | IMU device path. |
| 5 | Can the Quectel RM520N-GL (M.2 B-key) be rehomed? | No B-key slot on the IOTA. |
| 6 | USB3 LPM and `usbfs_memory_mb` behaviour on the N150 xHCI. | Known issue #19 — the Alvium stalls without these. |
| 7 | Sustained JPEG XL encode throughput at the production frame size. | Sets the achievable capture rate. **Measured 2026-09-30 on tower 121:** a full-resolution (5328×3040) colour frame at distance 0.8, effort 4 takes 0.67 s with 3 threads (0.73 s while the camera streams), 0.50 s with 4; on a sharp, detailed frame 0.74 s with 4 threads, and one save worker keeps up with about one frame per 0.8 s. The 3 Delta (tower 111) is about 55% slower per pixel ([camera-capture-measurements.md](camera-capture-measurements.md)). |

---

## Sources

- [LattePanda IOTA product page](https://www.lattepanda.com/lattepanda-iota)
- [LattePanda Docs — IOTA Internal Interface (36-pin pinout)](https://docs.lattepanda.com/content/iota_edition/io_playability_Internal/)
- [LattePanda Docs — IOTA RP2040 Programming](https://docs.lattepanda.com/content/iota_edition/rp2040_programming/)
- [LattePanda Docs — Migration Guide (V1 to IOTA)](https://docs.lattepanda.com/content/iota_edition/migration_guide_v1_to_iota/)
- [CNX Software — LattePanda IOTA SBC combines Intel N150 with RP2040](https://www.cnx-software.com/2025/09/18/lattepanda-iota-sbc-combines-intel-n150-soc-with-raspberry-pi-rp2040-for-gpio-and-power-control/)
- [LinuxGizmos — LattePanda IOTA brings Intel N150 and RP2040 co-processor](https://linuxgizmos.com/lattepanda-iota-brings-intel-n150-and-rp2040-co-processor-in-palm-sized-sbc/)
- [DFRobot — LattePanda IOTA 8GB/64GB](https://www.dfrobot.com/product-2989.html)
- [DFRobot Wiki — DFR1250 M.2 M-Key Expansion Board](https://wiki.dfrobot.com/SKU_DFR1250_M2_M_Key_Expansion_Board)
- [techtipsy — LattePanda IOTA review: how does it perform as a home server?](https://ounapuu.ee/posts/2025/11/18/lattepanda-iota/)
- [CNX Software — LattePanda Sigma (ATmega32U4 reference)](https://www.cnx-software.com/2023/04/26/lattepanda-sigma-intel-core-i5-1340p-raptor-lake-sbc-atmega32u4-arduino-mcu/)
- [Arduino-Pico (earlephilhower) — PlatformIO integration](https://arduino-pico.readthedocs.io/en/latest/platformio.html)