244 lines
9.5 KiB
C
Executable File
244 lines
9.5 KiB
C
Executable File
/*******************************************************************************
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* Copyright © 2019 TRINAMIC Motion Control GmbH & Co. KG
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* (now owned by Analog Devices Inc.),
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*
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* Copyright © 2024 Analog Devices Inc. All Rights Reserved.
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* This software is proprietary to Analog Devices, Inc. and its licensors.
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*******************************************************************************/
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#ifndef TMC_IC_TMC4361A_H_
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#define TMC_IC_TMC4361A_H_
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#include "TMC4361A_HW_Abstraction.h"
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#include <stdint.h>
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#include <stdbool.h>
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#include <stddef.h>
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/*******************************************************************************
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* API Configuration Defines
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* These control optional features of the TMC-API implementation.
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* These can be commented in/out here or defined from the build system.
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*******************************************************************************/
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// Uncomment if you want to save space.....
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// and put the table into your own .c file
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//#define TMC_API_EXTERNAL_CRC_TABLE 1
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#ifndef TMC4361A_CACHE
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#define TMC4361A_CACHE 1
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//#define TMC4361A_CACHE 0
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#endif
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// To use the caching mechanism already implemented by the TMC-API, set TMC4361A_ENABLE_TMC_CACHE to '1'.
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// Set TMC4361A_ENABLE_TMC_CACHE to '0' if one wants to have their own cache implementation.
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#ifndef TMC4361A_ENABLE_TMC_CACHE
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#define TMC4361A_ENABLE_TMC_CACHE 1
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//#define TMC4361A_ENABLE_TMC_CACHE 0
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#endif
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/******************************************************************************/
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typedef struct
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{
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uint32_t mask;
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uint8_t shift;
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uint8_t address;
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bool isSigned;
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} RegisterField;
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// => TMC-API wrapper
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extern void tmc4361A_setStatus(uint16_t icID, uint8_t *data);
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extern void tmc4361A_readWriteSPI(uint16_t icID, uint8_t *data, size_t dataLength);
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// => TMC-API wrapper
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int32_t tmc4361A_readRegister(uint16_t icID, uint8_t address);
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void tmc4361A_writeRegister(uint16_t icID, uint8_t address, int32_t value);
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void tmc4361A_readWriteCover(uint16_t icID, uint8_t *data, size_t length);
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static inline uint32_t tmc4361A_fieldExtract(uint32_t data, RegisterField field)
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{
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uint32_t value = (data & field.mask) >> field.shift;
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if (field.isSigned)
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{
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// Apply signedness conversion
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uint32_t baseMask = field.mask >> field.shift;
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uint32_t signMask = baseMask & (~baseMask >> 1);
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value = (value ^ signMask) - signMask;
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}
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return value;
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}
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static inline uint32_t tmc4361A_fieldRead(uint16_t icID, RegisterField field)
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{
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uint32_t value = tmc4361A_readRegister(icID, field.address);
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return tmc4361A_fieldExtract(value, field);
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}
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static inline uint32_t field_update(uint32_t data, RegisterField field, uint32_t value)
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{
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return (data & (~field.mask)) | ((value << field.shift) & field.mask);
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}
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static inline void tmc4361A_fieldWrite(uint16_t icID, RegisterField field, uint32_t value)
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{
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uint32_t regValue = tmc4361A_readRegister(icID, field.address);
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regValue = field_update(regValue, field, value);
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tmc4361A_writeRegister(icID, field.address, regValue);
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}
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/**************************************************************** Cache Implementation *************************************************************************/
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#if TMC4361A_CACHE == 1
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#if TMC4361A_ENABLE_TMC_CACHE == 1
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// By default, support one IC in the cache
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#ifndef TMC4361A_IC_CACHE_COUNT
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#define TMC4361A_IC_CACHE_COUNT 1
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#endif
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typedef enum {
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TMC4361A_CACHE_READ,
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TMC4361A_CACHE_WRITE,
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// Special operation: Put content into the cache without marking the entry as dirty.
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// Only used to initialize the cache with hardware defaults. This will allow reading
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// from write-only registers that have a value inside them on reset. When using this
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// operation, a restore will *not* rewrite that filled register!
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TMC4361A_CACHE_FILL_DEFAULT
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} TMC4361ACacheOp;
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typedef struct
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{
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uint8_t address;
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uint32_t value;
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} TMC4361ARegisterConstant;
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#define TMC4361A_ACCESS_DIRTY 0x08 // Register has been written since reset -> shadow register is valid for restore
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#define TMC4361A_ACCESS_READ 0x01
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#define TMC_ACCESS_WRITE 0x02
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#define TMC4361A_ACCESS_W_PRESET 0x42
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#define TMC_IS_RESETTABLE(x) (((x) & (TMC_ACCESS_W_PRESET)) == TMC_ACCESS_WRITE) // Write bit set, Hardware preset bit not set
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#define TMC4361A_IS_READABLE(x) ((x) & TMC4361A_ACCESS_READ)
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#define TMC_IS_WRITABLE(x) ((x) & TMC_ACCESS_WRITE)
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#define ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
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// Memory access helpers
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// Force the compiler to access a location exactly once
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#define ACCESS_ONCE(x) *((volatile typeof(x) *) (&x))
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#ifndef MAX
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#define MAX(a,b) (((a)>(b)) ? (a) : (b))
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#endif
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// Default Register Values
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#define R10 0x00040001 // STP_LENGTH_ADD
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#define R20 0x00000001 // RAMPMODE
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#define R28 0x00013880 // AMAX
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#define R29 0x00013880 // DMAX
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#define R2D 0x000003E8 // BOW1
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#define R2E 0x000003E8 // BOW2
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#define R2F 0x000003E8 // BOW3
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#define R30 0x000003E8 // BOW4
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#define R54 0x00009C40 // ENC_IN_RES
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#define ____ 0x00
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#ifndef N_A
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#define N_A 0x00
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#endif
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static const int32_t tmc4361A_sampleRegisterPreset[TMC4361A_REGISTER_COUNT] =
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{
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// 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F
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0, 0, 0, 0, 0, 0, N_A, N_A, 0, 0, N_A, N_A, 0, 0, 0, 0, // 0x00 - 0x0F
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R10, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, N_A, 0, 0, N_A, // 0x10 - 0x1F
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R20, 0, 0, 0, 0, 0, 0, 0, R28, R29, 0, 0, 0, R2D, R2E, R2F, // 0x20 - 0x2F
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R30, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x30 - 0x3F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x40 - 0x4F
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0, 0, 0, N_A, R54, 0, N_A, N_A, N_A, 0, 0, 0, 0, 0, 0, 0, // 0x50 - 0x5F
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0, 0, N_A, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x60 - 0x6F
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N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, 0, 0, N_A, N_A, 0, N_A, 0 // 0x70 - 0x7F
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};
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// Undefine the default register values.
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// This prevents warnings in case multiple TMC-API chip headers are included at once
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#undef R10
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#undef R20
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#undef R24
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#undef R28
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#undef R29
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#undef R2D
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#undef R2E
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#undef R2F
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#undef R30
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#undef R54
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// Register access permissions:
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// 0x00: none (reserved)
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// 0x01: read
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// 0x02: write
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// 0x03: read/write
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// 0x13: read/write, separate functions/values for reading or writing
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// 0x23: read/write, holds read or write to clear flags
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// 0x42: write, has hardware presets on reset
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// 0x43: read/write, has hardware presets on reset
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// 0x53: read/write, has hardware presets on reset, separate functions/values for reading or writing
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static const uint8_t tmc4361A_registerAccess[TMC4361A_REGISTER_COUNT] =
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{
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// 0 1 2 3 4 5 6 7 8 9 A B C D E F
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0x43, 0x03, 0x03, 0x03, 0x03, 0x03, 0x43, 0x43, 0x03, 0x03, 0x43, 0x43, 0x03, 0x03, 0x23, 0x01, // 0x00 - 0x0F
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0x03, 0x03, 0x43, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x43, 0x03, 0x03, 0x43, // 0x10 - 0x1F
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0x03, 0x03, 0x01, 0x01, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, // 0x20 - 0x2F
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0x03, 0x43, 0x03, 0x03, 0x03, 0x03, 0x13, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, // 0x30 - 0x3F
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0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, // 0x40 - 0x4F
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0x03, 0x13, 0x13, 0x42, 0x13, 0x02, 0x42, 0x42, 0x42, 0x03, 0x13, 0x13, 0x02, 0x13, 0x02, 0x02, // 0x50 - 0x5F
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0x02, 0x02, 0x42, 0x02, ____, 0x01, 0x01, 0x02, 0x02, 0x02, 0x01, 0x01, 0x13, 0x13, 0x01, 0x01, // 0x60 - 0x6F
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0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x13, 0x01, 0x13, 0x13, 0x02, 0x42, 0x01 // 0x70 - 0x7F
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};
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// Register constants (only required for 0x42 registers, since we do not have
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// any way to find out the content but want to hold the actual value in the
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// shadow register so an application (i.e. the TMCL IDE) can still display
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// the values. This only works when the register content is constant.
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static const TMC4361ARegisterConstant tmc4361A_RegisterConstants[] =
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{ // Use ascending addresses!
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{ 0x53, 0xFFFFFFFF }, // ENC_POS_DEV_TOL
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{ 0x56, 0x00A000A0 }, // SER_CLK_IN_HIGH, SER_CLK_IN_LOW
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{ 0x57, 0x00F00000 }, // SSI_IN_CLK_DELAY, SSI_IN_WTIME
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{ 0x58, 0x00000190 }, // SER_PTIME
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{ 0x62, 0x00FFFFFF }, // ENC_VEL_ZERO
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{ 0x70, 0xAAAAB554 }, // MSLUT[0]
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{ 0x71, 0x4A9554AA }, // MSLUT[1]
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{ 0x72, 0x24492929 }, // MSLUT[2]
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{ 0x73, 0x10104222 }, // MSLUT[3]
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{ 0x74, 0xFBFFFFFF }, // MSLUT[4]
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{ 0x75, 0xB5BB777D }, // MSLUT[5]
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{ 0x76, 0x49295556 }, // MSLUT[6]
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{ 0x77, 0x00404222 }, // MSLUT[7]
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{ 0x78, 0xFFFF8056 }, // MSLUTSEL
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{ 0x7E, 0x00F70000 }, // START_SIN, START_SIN_90_120, DAC_OFFSET
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};
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extern uint8_t tmc4361A_dirtyBits[TMC4361A_IC_CACHE_COUNT][TMC4361A_REGISTER_COUNT/8];
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extern int32_t tmc4361A_shadowRegister[TMC4361A_IC_CACHE_COUNT][TMC4361A_REGISTER_COUNT];
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void tmc4361A_setDirtyBit(uint16_t icID, uint8_t index, bool value);
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bool tmc4361A_getDirtyBit(uint16_t icID, uint8_t index);
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extern bool tmc4361A_cache(uint16_t icID, TMC4361ACacheOp operation, uint8_t address, uint32_t *value);
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void tmc4361A_initCache(void);
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#endif
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#endif
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/***************************************************************************************************************************************************/
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#endif /* TMC_IC_TMC4361A_H_ */
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