177 lines
6.6 KiB
C
Executable File
177 lines
6.6 KiB
C
Executable File
/*******************************************************************************
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* Copyright © 2019 TRINAMIC Motion Control GmbH & Co. KG
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* (now owned by Analog Devices Inc.),
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*
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* Copyright © 2024 Analog Devices Inc. All Rights Reserved.
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* This software is proprietary to Analog Devices, Inc. and its licensors.
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*******************************************************************************/
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#ifndef TMC_IC_TMC2224_H_
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#define TMC_IC_TMC2224_H_
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#include <stdint.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include "TMC2224_HW_Abstraction.h"
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/*******************************************************************************
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* API Configuration Defines
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* These control optional features of the TMC-API implementation.
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* These can be commented in/out here or defined from the build system.
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*******************************************************************************/
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// Uncomment if you want to save space.....
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// and put the table into your own .c file
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//#define TMC_API_EXTERNAL_CRC_TABLE 1
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#ifndef TMC2224_CACHE
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#define TMC2224_CACHE 1
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//#define TMC2224_CACHE 0
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#endif
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// To use the caching mechanism already implemented by the TMC-API, set TMC2224_ENABLE_TMC_CACHE to '1'.
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// Set TMC2224_ENABLE_TMC_CACHE to '0' if one wants to have their own cache implementation.
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#ifndef TMC2224_ENABLE_TMC_CACHE
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#define TMC2224_ENABLE_TMC_CACHE 1
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//#define TMC2224_ENABLE_TMC_CACHE 0
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#endif
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/******************************************************************************/
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// => TMC-API wrapper
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extern bool tmc2224_readWriteUART(uint16_t icID, uint8_t *data, size_t writeLength, size_t readLength);
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extern uint8_t tmc2224_getNodeAddress(uint16_t icID);
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// => TMC-API wrapper
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int32_t tmc2224_readRegister(uint16_t icID, uint8_t address);
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void tmc2224_writeRegister(uint16_t icID, uint8_t address, int32_t value);
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typedef struct
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{
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uint32_t mask;
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uint8_t shift;
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uint8_t address;
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bool isSigned;
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} RegisterField;
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static inline uint32_t tmc2224_fieldExtract(uint32_t data, RegisterField field)
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{
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uint32_t value = (data & field.mask) >> field.shift;
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if (field.isSigned)
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{
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// Apply signedness conversion
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uint32_t baseMask = field.mask >> field.shift;
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uint32_t signMask = baseMask & (~baseMask >> 1);
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value = (value ^ signMask) - signMask;
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}
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return value;
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}
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static inline uint32_t tmc2224_fieldRead(uint16_t icID, RegisterField field)
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{
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uint32_t value = tmc2224_readRegister(icID, field.address);
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return tmc2224_fieldExtract(value, field);
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}
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static inline uint32_t tmc2224_fieldUpdate(uint32_t data, RegisterField field, uint32_t value)
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{
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return (data & (~field.mask)) | ((value << field.shift) & field.mask);
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}
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static inline void tmc2224_fieldWrite(uint16_t icID, RegisterField field, uint32_t value)
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{
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uint32_t regValue = tmc2224_readRegister(icID, field.address);
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regValue = tmc2224_fieldUpdate(regValue, field, value);
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tmc2224_writeRegister(icID, field.address, regValue);
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}
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/**************************************************************** Cache Implementation *************************************************************************/
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#if TMC2224_CACHE == 1
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#if TMC2224_ENABLE_TMC_CACHE == 1
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// By default, support one IC in the cache
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#ifndef TMC2224_IC_CACHE_COUNT
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#define TMC2224_IC_CACHE_COUNT 1
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#endif
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typedef enum {
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TMC2224_CACHE_READ,
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TMC2224_CACHE_WRITE,
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// Special operation: Put content into the cache without marking the entry as dirty.
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// Only used to initialize the cache with hardware defaults. This will allow reading
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// from write-only registers that have a value inside them on reset. When using this
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// operation, a restore will *not* rewrite that filled register!
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TMC2224_CACHE_FILL_DEFAULT
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} TMC2224CacheOp;
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#define TMC2224_ACCESS_DIRTY 0x08 // Register has been written since reset -> shadow register is valid for restore
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#define TMC2224_ACCESS_READ 0x01
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#define TMC2224_IS_READABLE(x) ((x) & TMC2224_ACCESS_READ)
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#define ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
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// Default Register values
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#define R00 0x00000141 // GCONF
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#define R10 0x00001F00 // IHOLD_IRUN
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#define R11 0x00000014 // TPOWERDOWN
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#define R6C 0x10000053 // CHOPCONF
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#define R70 0xC10D0024 // PWMCONF
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/* Register access permissions:
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* 0: none (reserved)
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* 1: read
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* 2: write
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* 3: read/write
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* 7: read^write (separate functions/values)
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*/
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static const uint8_t tmc2224_registerAccess[TMC2224_REGISTER_COUNT] =
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{
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// 0 1 2 3 4 5 6 7 8 9 A B C D E F
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3, 3, 1, 2, 2, 1, 1, 3, 0, 0, 0, 0, 0, 0, 0, 0, // 0x00 - 0x0F
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2, 2, 1, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x10 - 0x1F
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0, 0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x20 - 0x2F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x30 - 0x3F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x40 - 0x4F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x50 - 0x5F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 3, 0, 0, 1, // 0x60 - 0x6F
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3, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 // 0x70 - 0x7F
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};
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static const int32_t tmc2224_sampleRegisterPreset[TMC2224_REGISTER_COUNT] = {
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// 0 1 2 3 4 5 6 7 8 9 A B C D E F
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R00, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x00 - 0x0F
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R10, R11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x10 - 0x1F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x20 - 0x2F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x30 - 0x3F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x40 - 0x4F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x50 - 0x5F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R6C, 0, 0, 0, // 0x60 - 0x6F
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R70, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 // 0x70 - 0x7F
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};
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// Undefine the default register values.
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// This prevents warnings in case multiple TMC-API chip headers are included at once
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#undef R00
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#undef R10
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#undef R11
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#undef R6C
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#undef R70
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extern uint8_t tmc2224_dirtyBits[TMC2224_IC_CACHE_COUNT][TMC2224_REGISTER_COUNT/8];
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extern int32_t tmc2224_shadowRegister[TMC2224_IC_CACHE_COUNT][TMC2224_REGISTER_COUNT];
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void tmc2224_setDirtyBit(uint16_t icID, uint8_t index, bool value);
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bool tmc2224_getDirtyBit(uint16_t icID, uint8_t index);
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extern bool tmc2224_cache(uint16_t icID, TMC2224CacheOp operation, uint8_t address, uint32_t *value);
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#endif
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#endif
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#endif /* TMC_IC_TMC2224_H_ */
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