222 lines
9.2 KiB
C
Executable File
222 lines
9.2 KiB
C
Executable File
/*******************************************************************************
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* Copyright © 2025 Analog Devices Inc. All Rights Reserved.
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* This software is proprietary to Analog Devices, Inc. and its licensors.
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*******************************************************************************/
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#ifndef TMC_IC_TMC2241_H_
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#include <stdint.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include "TMC2241_HW_Abstraction.h"
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/*******************************************************************************
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* API Configuration Defines
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* These control optional features of the TMC-API implementation.
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* These can be commented in/out here or defined from the build system.
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*******************************************************************************/
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// Uncomment if you want to save space.....
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// and put the table into your own .c file
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//#define TMC_API_EXTERNAL_CRC_TABLE 1
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// To enable the cache mechanism in order to keep the copy of all registers, set TMC2241_CACHE to '1'.
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// With this mechanism the value of write-only registers could be read from their shadow copies.
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#ifndef TMC2241_CACHE
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#define TMC2241_CACHE 1
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//#define TMC2241_CACHE 0
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#endif
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// To use the caching mechanism already implemented by the TMC-API, set TMC2241_ENABLE_TMC_CACHE to '1'.
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// Set TMC2241_ENABLE_TMC_CACHE to '0' if one wants to have their own cache implementation.
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#ifndef TMC2241_ENABLE_TMC_CACHE
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#define TMC2241_ENABLE_TMC_CACHE 1
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//#define TMC2241_ENABLE_TMC_CACHE 0
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#endif
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/******************************************************************************/
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typedef enum {
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IC_BUS_SPI,
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IC_BUS_UART,
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IC_BUS_WLAN,
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} TMC2241BusType;
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// => TMC-API wrapper
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extern void tmc2241_readWriteSPI(uint16_t icID, uint8_t *data, size_t dataLength);
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extern bool tmc2241_readWriteUART(uint16_t icID, uint8_t *data, size_t writeLength, size_t readLength);
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extern TMC2241BusType tmc2241_getBusType(uint16_t icID);
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extern uint8_t tmc2241_getNodeAddress(uint16_t icID);
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// => TMC-API wrapper
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int32_t tmc2241_readRegister(uint16_t icID, uint8_t address);
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void tmc2241_writeRegister(uint16_t icID, uint8_t address, int32_t value);
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typedef struct
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{
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uint32_t mask;
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uint8_t shift;
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uint8_t address;
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bool isSigned;
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} RegisterField;
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static inline uint32_t tmc2241_fieldExtract(uint32_t data, RegisterField field)
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{
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uint32_t value = (data & field.mask) >> field.shift;
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if (field.isSigned)
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{
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// Apply signedness conversion
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uint32_t baseMask = field.mask >> field.shift;
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uint32_t signMask = baseMask & (~baseMask >> 1);
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value = (value ^ signMask) - signMask;
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}
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return value;
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}
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static inline uint32_t tmc2241_fieldRead(uint16_t icID, RegisterField field)
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{
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uint32_t value = tmc2241_readRegister(icID, field.address);
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return tmc2241_fieldExtract(value, field);
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}
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static inline uint32_t tmc2241_fieldUpdate(uint32_t data, RegisterField field, uint32_t value)
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{
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return (data & (~field.mask)) | ((value << field.shift) & field.mask);
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}
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static inline void tmc2241_fieldWrite(uint16_t icID, RegisterField field, uint32_t value)
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{
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uint32_t regValue = tmc2241_readRegister(icID, field.address);
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regValue = tmc2241_fieldUpdate(regValue, field, value);
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tmc2241_writeRegister(icID, field.address, regValue);
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}
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/**************************************************************** Cache Implementation *************************************************************************/
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#if TMC2241_CACHE == 1
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#ifdef TMC2241_ENABLE_TMC_CACHE
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// By default, support one IC in the cache
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#ifndef TMC2241_IC_CACHE_COUNT
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#define TMC2241_IC_CACHE_COUNT 1
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#endif
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typedef enum {
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TMC2241_CACHE_READ,
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TMC2241_CACHE_WRITE,
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// Special operation: Put content into the cache without marking the entry as dirty.
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// Only used to initialize the cache with hardware defaults. This will allow reading
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// from write-only registers that have a value inside them on reset. When using this
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// operation, a restore will *not* rewrite that filled register!
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TMC2241_CACHE_FILL_DEFAULT,
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} TMC2241CacheOp;
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typedef struct{
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uint8_t address;
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uint32_t value;
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} TMC2241RegisterConstants;
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#define TMC2241_ACCESS_DIRTY 0x08 // Register has been written since reset -> shadow register is valid for restore
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#define TMC2241_ACCESS_READ 0x01
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#define TMC2241_ACCESS_W_PRESET 0x42
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#define TMC2241_IS_READABLE(x) ((x) & TMC2241_ACCESS_READ)
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#define ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
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// Helper define:
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// Most register permission arrays are initialized with 128 values.
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// In those fields its quite hard to have an easy overview of available
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// registers. For that, ____ is defined to 0, since 4 underscores are
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// very easy to distinguish from the 2-digit hexadecimal values.
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// This way, the used registers (permission != ACCESS_NONE) are easily spotted
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// amongst unused (permission == ACCESS_NONE) registers.
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#define ____ 0x00
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// Helper define:
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// Default reset values are not used if the corresponding register has a
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// hardware preset. Since this is not directly visible in the default
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// register reset values array, N_A is used as an indicator for a preset
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// value, where any value will be ignored anyways (N_A: not available).
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#define N_A 0
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// Default Register values
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#define R00 0x00002108 // GCONF
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#define R0A 0x00000020 // DRVCONF
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#define R10 0x00070A03 // IHOLD_IRUN
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#define R11 0x0000000A // TPOWERDOWN
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#define R2B 0x00000001 // VSTOP
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#define R3A 0x00010000 // ENC_CONST
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#define R52 0x0B920F25 // OTW_OV_VTH
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#define R6C 0x14410153 // CHOPCONF
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#define R70 0xC44C001E // PWMCONF
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// Register access permissions:
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// 0x00: none (reserved)
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// 0x01: read
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// 0x02: write
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// 0x03: read/write
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// 0x13: read/write, separate functions/values for reading or writing
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// 0x23: read/write, flag register (write to clear)
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// 0x42: write, has hardware presets on reset
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static const uint8_t tmc2241_registerAccess[TMC2241_REGISTER_COUNT] =
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{
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// 0 1 2 3 4 5 6 7 8 9 A B C D E F
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0x03, 0x23, 0x01, 0x03, 0x03, ____, ____, ____, ____, ____, 0x03, 0x03, ____, ____, ____, ____, // 0x00 - 0x0F
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0x03, 0x03, 0x01, 0x03, 0x03, 0x03, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, // 0x10 - 0x1F
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____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, 0x03, ____, ____, // 0x20 - 0x2F
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____, ____, ____, ____, ____, ____, ____, ____, 0x03, 0x03, 0x03, 0x23, 0x01, ____, ____, ____, // 0x30 - 0x3F
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____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, // 0x40 - 0x4F
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0x01, 0x01, 0x03, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, ____, // 0x50 - 0x5F
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0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x42, 0x01, 0x01, 0x03, 0x03, ____, 0x01, // 0x60 - 0x6F
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0x03, 0x01, 0x01, ____, 0x03, 0x01, 0x01, ____, ____, ____, ____, ____, ____, ____, ____, ____ // 0x70 - 0x7F
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};
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static const int32_t tmc2241_sampleRegisterPreset[TMC2241_REGISTER_COUNT] =
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{
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// 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F
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R00, 0, 0, 0, 0, 0, 0, 0, 0, 0, R0A, 0, 0, 0, 0, 0, // 0x00 - 0x0F
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R10, R11, 0, 0, 0, 0, 0, 0, 0, 0, 0, R2B, 0, 0, 0, 0, // 0x10 - 0x1F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x20 - 0x2F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, R3A, 0, 0, 0, 0, 0, // 0x30 - 0x3F
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x40 - 0x4F
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0, 0, R52, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x50 - 0x5F
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N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, N_A, 0, 0, R6C, 0, 0, 0, // 0x60 - 0x6F
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R70, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // 0x70 - 0x7F
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};
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// Register constants (only required for 0x42 registers, since we do not have
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// any way to find out the content but want to hold the actual value in the
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// shadow register so an application (i.e. the TMCL IDE) can still display
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// the values. This only works when the register content is constant.
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static const TMC2241RegisterConstants tmc2241_RegisterConstants[] =
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{ // Use ascending addresses!
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{ 0x60, 0xAAAAB554 }, // MSLUT[0]
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{ 0x61, 0x4A9554AA }, // MSLUT[1]
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{ 0x62, 0x24492929 }, // MSLUT[2]
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{ 0x63, 0x10104222 }, // MSLUT[3]
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{ 0x64, 0xFBFFFFFF }, // MSLUT[4]
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{ 0x65, 0xB5BB777D }, // MSLUT[5]
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{ 0x66, 0x49295556 }, // MSLUT[6]
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{ 0x67, 0x00404222 }, // MSLUT[7]
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{ 0x68, 0xFFFF8056 }, // MSLUTSEL
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{ 0x69, 0x00F70000 } // MSLUTSTART
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};
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extern uint8_t tmc2241_dirtyBits[TMC2241_IC_CACHE_COUNT][TMC2241_REGISTER_COUNT/8];
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extern int32_t tmc2241_shadowRegister[TMC2241_IC_CACHE_COUNT][TMC2241_REGISTER_COUNT];
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bool tmc2241_cache(uint16_t icID, TMC2241CacheOp operation, uint8_t address, uint32_t *value);
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void tmc2241_initCache(void);
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void tmc2241_setDirtyBit(uint16_t icID, uint8_t index, bool value);
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bool tmc2241_getDirtyBit(uint16_t icID, uint8_t index);
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#endif
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#endif
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/***************************************************************************************************************************************************/
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#endif /* TMC_IC_TMC2241_H_ */
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