/******************************************************************************* * Copyright © 2019 TRINAMIC Motion Control GmbH & Co. KG * (now owned by Analog Devices Inc.), * * Copyright © 2024 Analog Devices Inc. All Rights Reserved. * This software is proprietary to Analog Devices, Inc. and its licensors. *******************************************************************************/ #ifndef TMC6200_HW_ABSTRACTION #define TMC6200_HW_ABSTRACTION // Constants #define TMC6200_MOTORS 1 #define TMC6200_WRITE_BIT 0x80 #define TMC6200_ADDRESS_MASK 0x7F #define TMC6200_MAX_VELOCITY 8388096 #define TMC6200_MAX_ACCELERATION (uint16_t) 65535 // Registers #define TMC6200_GCONF 0x00 #define TMC6200_GSTAT 0x01 #define TMC6200_IOIN_OUTPUT 0x04 #define TMC6200_OTP_PROG 0x06 #define TMC6200_OTP_READ 0x07 #define TMC6200_FACTORY_CONF 0x08 #define TMC6200_SHORT_CONF 0x09 #define TMC6200_DRV_CONF 0x0A // Register fields #define TMC6200_DISABLE_MASK 0x00000001 #define TMC6200_DISABLE_SHIFT 0 #define TMC6200_DISABLE_FIELD ((RegisterField) {TMC6200_DISABLE_MASK, TMC6200_DISABLE_SHIFT, TMC6200_GCONF, false}) #define TMC6200_SINGLELINE_MASK 0x00000002 #define TMC6200_SINGLELINE_SHIFT 1 #define TMC6200_SINGLELINE_FIELD ((RegisterField) {TMC6200_SINGLELINE_MASK, TMC6200_SINGLELINE_SHIFT, TMC6200_GCONF, false}) #define TMC6200_FAULTDIRECT_MASK 0x00000004 #define TMC6200_FAULTDIRECT_SHIFT 2 #define TMC6200_FAULTDIRECT_FIELD ((RegisterField) {TMC6200_FAULTDIRECT_MASK, TMC6200_FAULTDIRECT_SHIFT, TMC6200_GCONF, false}) #define TMC6200_UNUSED_MASK 0x00000008 #define TMC6200_UNUSED_SHIFT 3 #define TMC6200_UNUSED_FIELD ((RegisterField) {TMC6200_UNUSED_MASK, TMC6200_UNUSED_SHIFT, TMC6200_GCONF, false}) #define TMC6200_AMPLIFICATION_MASK 0x00000030 #define TMC6200_AMPLIFICATION_SHIFT 4 #define TMC6200_AMPLIFICATION_FIELD ((RegisterField) {TMC6200_AMPLIFICATION_MASK, TMC6200_AMPLIFICATION_SHIFT, TMC6200_GCONF, false}) #define TMC6200_AMPLIFIER_OFF_MASK 0x00000040 #define TMC6200_AMPLIFIER_OFF_SHIFT 6 #define TMC6200_AMPLIFIER_OFF_FIELD ((RegisterField) {TMC6200_AMPLIFIER_OFF_MASK, TMC6200_AMPLIFIER_OFF_SHIFT, TMC6200_GCONF, false}) #define TMC6200_TEST_MODE_MASK 0x00000080 #define TMC6200_TEST_MODE_SHIFT 7 #define TMC6200_TEST_MODE_FIELD ((RegisterField) {TMC6200_TEST_MODE_MASK, TMC6200_TEST_MODE_SHIFT, TMC6200_GCONF, false}) #define TMC6200_RESET_MASK 0x00000001 #define TMC6200_RESET_SHIFT 0 #define TMC6200_RESET_FIELD ((RegisterField) {TMC6200_RESET_MASK, TMC6200_RESET_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_DRV_OTPW_MASK 0x00000002 #define TMC6200_DRV_OTPW_SHIFT 1 #define TMC6200_DRV_OTPW_FIELD ((RegisterField) {TMC6200_DRV_OTPW_MASK, TMC6200_DRV_OTPW_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_DRV_OT_MASK 0x00000004 #define TMC6200_DRV_OT_SHIFT 2 #define TMC6200_DRV_OT_FIELD ((RegisterField) {TMC6200_DRV_OT_MASK, TMC6200_DRV_OT_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_UV_CP_MASK 0x00000008 #define TMC6200_UV_CP_SHIFT 3 #define TMC6200_UV_CP_FIELD ((RegisterField) {TMC6200_UV_CP_MASK, TMC6200_UV_CP_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_SHORTDET_U_MASK 0x00000010 #define TMC6200_SHORTDET_U_SHIFT 4 #define TMC6200_SHORTDET_U_FIELD ((RegisterField) {TMC6200_SHORTDET_U_MASK, TMC6200_SHORTDET_U_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_S2GU_MASK 0x00000020 #define TMC6200_S2GU_SHIFT 5 #define TMC6200_S2GU_FIELD ((RegisterField) {TMC6200_S2GU_MASK, TMC6200_S2GU_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_S2VSU_MASK 0x00000040 #define TMC6200_S2VSU_SHIFT 6 #define TMC6200_S2VSU_FIELD ((RegisterField) {TMC6200_S2VSU_MASK, TMC6200_S2VSU_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_SHORTDET_V_MASK 0x00000100 #define TMC6200_SHORTDET_V_SHIFT 8 #define TMC6200_SHORTDET_V_FIELD ((RegisterField) {TMC6200_SHORTDET_V_MASK, TMC6200_SHORTDET_V_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_S2GV_MASK 0x00000200 #define TMC6200_S2GV_SHIFT 9 #define TMC6200_S2GV_FIELD ((RegisterField) {TMC6200_S2GV_MASK, TMC6200_S2GV_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_S2VSV_MASK 0x00000400 #define TMC6200_S2VSV_SHIFT 10 #define TMC6200_S2VSV_FIELD ((RegisterField) {TMC6200_S2VSV_MASK, TMC6200_S2VSV_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_SHORTDET_W_MASK 0x00001000 #define TMC6200_SHORTDET_W_SHIFT 12 #define TMC6200_SHORTDET_W_FIELD ((RegisterField) {TMC6200_SHORTDET_W_MASK, TMC6200_SHORTDET_W_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_S2GW_MASK 0x00002000 #define TMC6200_S2GW_SHIFT 13 #define TMC6200_S2GW_FIELD ((RegisterField) {TMC6200_S2GW_MASK, TMC6200_S2GW_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_S2VSW_MASK 0x00004000 #define TMC6200_S2VSW_SHIFT 14 #define TMC6200_S2VSW_FIELD ((RegisterField) {TMC6200_S2VSW_MASK, TMC6200_S2VSW_SHIFT, TMC6200_GSTAT, false}) #define TMC6200_UL_MASK 0x00000001 #define TMC6200_UL_SHIFT 0 #define TMC6200_UL_FIELD ((RegisterField) {TMC6200_UL_MASK, TMC6200_UL_SHIFT, TMC6200_IOIN_OUTPUT, false}) #define TMC6200_UH_MASK 0x00000002 #define TMC6200_UH_SHIFT 1 #define TMC6200_UH_FIELD ((RegisterField) {TMC6200_UH_MASK, TMC6200_UH_SHIFT, TMC6200_IOIN_OUTPUT, false}) #define TMC6200_VL_MASK 0x00000004 #define TMC6200_VL_SHIFT 2 #define TMC6200_VL_FIELD ((RegisterField) {TMC6200_VL_MASK, TMC6200_VL_SHIFT, TMC6200_IOIN_OUTPUT, false}) #define TMC6200_VH_MASK 0x00000008 #define TMC6200_VH_SHIFT 3 #define TMC6200_VH_FIELD ((RegisterField) {TMC6200_VH_MASK, TMC6200_VH_SHIFT, TMC6200_IOIN_OUTPUT, false}) #define TMC6200_WL_MASK 0x00000010 #define TMC6200_WL_SHIFT 4 #define TMC6200_WL_FIELD ((RegisterField) {TMC6200_WL_MASK, TMC6200_WL_SHIFT, TMC6200_IOIN_OUTPUT, false}) #define TMC6200_WH_MASK 0x00000020 #define TMC6200_WH_SHIFT 5 #define TMC6200_WH_FIELD ((RegisterField) {TMC6200_WH_MASK, TMC6200_WH_SHIFT, TMC6200_IOIN_OUTPUT, false}) #define TMC6200_DRV_EN_MASK 0x00000040 #define TMC6200_DRV_EN_SHIFT 6 #define TMC6200_DRV_EN_FIELD ((RegisterField) {TMC6200_DRV_EN_MASK, TMC6200_DRV_EN_SHIFT, TMC6200_IOIN_OUTPUT, false}) #define TMC6200_OTPW_MASK 0x00000100 #define TMC6200_OTPW_SHIFT 8 #define TMC6200_OTPW_FIELD ((RegisterField) {TMC6200_OTPW_MASK, TMC6200_OTPW_SHIFT, TMC6200_IOIN_OUTPUT, false}) #define TMC6200_OT136_C_MASK 0x00000200 #define TMC6200_OT136_C_SHIFT 9 #define TMC6200_OT136_C_FIELD ((RegisterField) {TMC6200_OT136_C_MASK, TMC6200_OT136_C_SHIFT, TMC6200_IOIN_OUTPUT, false}) #define TMC6200_OT143_C_MASK 0x00000400 #define TMC6200_OT143_C_SHIFT 10 #define TMC6200_OT143_C_FIELD ((RegisterField) {TMC6200_OT143_C_MASK, TMC6200_OT143_C_SHIFT, TMC6200_IOIN_OUTPUT, false}) #define TMC6200_OT150_C_MASK 0x00000800 #define TMC6200_OT150_C_SHIFT 11 #define TMC6200_OT150_C_FIELD ((RegisterField) {TMC6200_OT150_C_MASK, TMC6200_OT150_C_SHIFT, TMC6200_IOIN_OUTPUT, false}) #define TMC6200_VERSION_MASK 0xFF000000 #define TMC6200_VERSION_SHIFT 24 #define TMC6200_VERSION_FIELD ((RegisterField) {TMC6200_VERSION_MASK, TMC6200_VERSION_SHIFT, TMC6200_IOIN_OUTPUT, false}) #define TMC6200_OTPBIT_MASK 0x00000007 #define TMC6200_OTPBIT_SHIFT 0 #define TMC6200_OTPBIT_FIELD ((RegisterField) {TMC6200_OTPBIT_MASK, TMC6200_OTPBIT_SHIFT, TMC6200_OTP_PROG, false}) #define TMC6200_OTPBYTE_MASK 0x00000030 #define TMC6200_OTPBYTE_SHIFT 4 #define TMC6200_OTPBYTE_FIELD ((RegisterField) {TMC6200_OTPBYTE_MASK, TMC6200_OTPBYTE_SHIFT, TMC6200_OTP_PROG, false}) #define TMC6200_OTPMAGIC_MASK 0x0000FF00 #define TMC6200_OTPMAGIC_SHIFT 8 #define TMC6200_OTPMAGIC_FIELD ((RegisterField) {TMC6200_OTPMAGIC_MASK, TMC6200_OTPMAGIC_SHIFT, TMC6200_OTP_PROG, false}) #define TMC6200_OTP_BBM_MASK 0x000000C0 #define TMC6200_OTP_BBM_SHIFT 6 #define TMC6200_OTP_BBM_FIELD ((RegisterField) {TMC6200_OTP_BBM_MASK, TMC6200_OTP_BBM_SHIFT, TMC6200_OTP_READ, false}) #define TMC6200_OTP_S2_LEVEL_MASK 0x00000020 #define TMC6200_OTP_S2_LEVEL_SHIFT 5 #define TMC6200_OTP_S2_LEVEL_FIELD ((RegisterField) {TMC6200_OTP_S2_LEVEL_MASK, TMC6200_OTP_S2_LEVEL_SHIFT, TMC6200_OTP_READ, false}) #define TMC6200_OTP_FCLKTRIM_MASK 0x0000001F #define TMC6200_OTP_FCLKTRIM_SHIFT 0 #define TMC6200_OTP_FCLKTRIM_FIELD ((RegisterField) {TMC6200_OTP_FCLKTRIM_MASK, TMC6200_OTP_FCLKTRIM_SHIFT, TMC6200_OTP_READ, false}) #define TMC6200_FACTORY_CONF_MASK 0x0000001F #define TMC6200_FACTORY_CONF_SHIFT 0 #define TMC6200_FACTORY_CONF_FIELD ((RegisterField) {TMC6200_FACTORY_CONF_MASK, TMC6200_FACTORY_CONF_SHIFT, TMC6200_FACTORY_CONF, false}) #define TMC6200_S2VS_LEVEL_MASK 0x0000000F #define TMC6200_S2VS_LEVEL_SHIFT 0 #define TMC6200_S2VS_LEVEL_FIELD ((RegisterField) {TMC6200_S2VS_LEVEL_MASK, TMC6200_S2VS_LEVEL_SHIFT, TMC6200_SHORT_CONF, false}) #define TMC6200_S2G_LEVEL_MASK 0x00000F00 #define TMC6200_S2G_LEVEL_SHIFT 8 #define TMC6200_S2G_LEVEL_FIELD ((RegisterField) {TMC6200_S2G_LEVEL_MASK, TMC6200_S2G_LEVEL_SHIFT, TMC6200_SHORT_CONF, false}) #define TMC6200_SHORTFILTER_MASK 0x00030000 #define TMC6200_SHORTFILTER_SHIFT 16 #define TMC6200_SHORTFILTER_FIELD ((RegisterField) {TMC6200_SHORTFILTER_MASK, TMC6200_SHORTFILTER_SHIFT, TMC6200_SHORT_CONF, false}) #define TMC6200_SHORTDELAY_MASK 0x00100000 #define TMC6200_SHORTDELAY_SHIFT 20 #define TMC6200_SHORTDELAY_FIELD ((RegisterField) {TMC6200_SHORTDELAY_MASK, TMC6200_SHORTDELAY_SHIFT, TMC6200_SHORT_CONF, false}) #define TMC6200_RETRY_MASK 0x03000000 #define TMC6200_RETRY_SHIFT 24 #define TMC6200_RETRY_FIELD ((RegisterField) {TMC6200_RETRY_MASK, TMC6200_RETRY_SHIFT, TMC6200_SHORT_CONF, false}) #define TMC6200_PROTECT_PARALLEL_MASK 0x10000000 #define TMC6200_PROTECT_PARALLEL_SHIFT 28 #define TMC6200_PROTECT_PARALLEL_FIELD ((RegisterField) {TMC6200_PROTECT_PARALLEL_MASK, TMC6200_PROTECT_PARALLEL_SHIFT, TMC6200_SHORT_CONF, false}) #define TMC6200_DISABLE_S2G_MASK 0x20000000 #define TMC6200_DISABLE_S2G_SHIFT 29 #define TMC6200_DISABLE_S2G_FIELD ((RegisterField) {TMC6200_DISABLE_S2G_MASK, TMC6200_DISABLE_S2G_SHIFT, TMC6200_SHORT_CONF, false}) #define TMC6200_DISABLE_S2VS_MASK 0x40000000 #define TMC6200_DISABLE_S2VS_SHIFT 30 #define TMC6200_DISABLE_S2VS_FIELD ((RegisterField) {TMC6200_DISABLE_S2VS_MASK, TMC6200_DISABLE_S2VS_SHIFT, TMC6200_SHORT_CONF, false}) #define TMC6200_BBMCLKS_MASK 0x0000000F #define TMC6200_BBMCLKS_SHIFT 0 #define TMC6200_BBMCLKS_FIELD ((RegisterField) {TMC6200_BBMCLKS_MASK, TMC6200_BBMCLKS_SHIFT, TMC6200_DRV_CONF, false}) #define TMC6200_OTSELECT_MASK 0x00030000 #define TMC6200_OTSELECT_SHIFT 16 #define TMC6200_OTSELECT_FIELD ((RegisterField) {TMC6200_OTSELECT_MASK, TMC6200_OTSELECT_SHIFT, TMC6200_DRV_CONF, false}) #define TMC6200_DRVSTRENGTH_MASK 0x000C0000 #define TMC6200_DRVSTRENGTH_SHIFT 18 #define TMC6200_DRVSTRENGTH_FIELD ((RegisterField) {TMC6200_DRVSTRENGTH_MASK, TMC6200_DRVSTRENGTH_SHIFT, TMC6200_DRV_CONF, false}) #endif